<?xml version="1.0" encoding="UTF-8"?>
<rdf:RDF xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns="http://purl.org/rss/1.0/" xmlns:dc="http://purl.org/dc/elements/1.1/">
  <channel rdf:about="http://nopr.niscpr.res.in/handle/123456789/26443">
    <title>NOPR Collection:</title>
    <link>http://nopr.niscpr.res.in/handle/123456789/26443</link>
    <description />
    <items>
      <rdf:Seq>
        <rdf:li rdf:resource="http://nopr.niscpr.res.in/handle/123456789/26454" />
        <rdf:li rdf:resource="http://nopr.niscpr.res.in/handle/123456789/26453" />
        <rdf:li rdf:resource="http://nopr.niscpr.res.in/handle/123456789/26452" />
        <rdf:li rdf:resource="http://nopr.niscpr.res.in/handle/123456789/26451" />
      </rdf:Seq>
    </items>
    <dc:date>2026-10-11T22:17:09Z</dc:date>
  </channel>
  <item rdf:about="http://nopr.niscpr.res.in/handle/123456789/26454">
    <title>Performance Evaluation of NAS Parallel Benchmarks in Hypervisor using Design of Experiment</title>
    <link>http://nopr.niscpr.res.in/handle/123456789/26454</link>
    <description>Title: Performance Evaluation of NAS Parallel Benchmarks in Hypervisor using Design of Experiment
Authors: Prasad, Bhukya Devi; Sony, A L Reeta
Abstract: Server Consolidation is desired in order to&#xD;
make efficient use of available servers. This is achieved by using the concept&#xD;
of hypervisor. A large number of hypervisors are available in the market. Users&#xD;
have to choose a hypervisor depending on the type of application. Due to the&#xD;
large difference in the architecture of various hypervisors, it is very&#xD;
difficult to find which hypervisor will be best suitable for the application.&#xD;
The aim of this paper is to benchmark the hypervisors and examine the&#xD;
performance of NAS Parallel Benchmarks. Two hypervisors i.e. Xen and VMware&#xD;
were identified and their performance was measured against various factors.
Page(s): 81-86</description>
    <dc:date>2014-02-01T00:00:00Z</dc:date>
  </item>
  <item rdf:about="http://nopr.niscpr.res.in/handle/123456789/26453">
    <title>Preparation, Characterization and Application of Zeolite-based Catalyst for Production of Biodiesel from Waste Cooking Oil</title>
    <link>http://nopr.niscpr.res.in/handle/123456789/26453</link>
    <description>Title: Preparation, Characterization and Application of Zeolite-based Catalyst for Production of Biodiesel from Waste Cooking Oil
Authors: Hassani, Maryam; Najafpour, Ghasem D; Mohammadi, Maedeh; Rabiee, Mahmood
Abstract: Zeolite-based&#xD;
catalyst was prepared from a fine powder and kaolinite by pelletization method&#xD;
and used to&lt;span dir="RTL" style="font-family:Mangal;mso-ascii-font-family:" times="" new="" roman";mso-hansi-font-family:="" "times="" roman";letter-spacing:-.2pt"="" lang="EN-GB"&gt; synthesize fatty acid methyl esters&#xD;
(FAME) known as biodiesel from waste cooking oil (WCO) containing high amounts&#xD;
of free fatty acids (FFA). The prepared catalyst was characterized by Thermogravimetric analysis (TG/DTA), X-ray&#xD;
Diffraction (XRD), Fourier Transform Infrared (FTIR) spectroscopy and &lt;span style="mso-bidi-font-family:Mangal;color:black;background:white;font-style:&#xD;
normal"&gt;Brunauer-Emmett-Teller&amp;nbsp;(&lt;span style="mso-bidi-font-family:Mangal;&#xD;
color:black;font-style:normal"&gt;BET) surface area analysis. The zeolite-based catalyst was&#xD;
employed to simultaneously catalyze the esteriﬁcation of fatty acids and&#xD;
transesteriﬁcation of&amp;nbsp;triglycerides present&#xD;
in the waste oil feedstock to&#xD;
biodiesel. The condition for biodiesel synthesis was&lt;span dir="RTL" style="font-family:Mangal;mso-ascii-font-family:" times="" new="" roman";="" mso-hansi-font-family:"times="" roman";letter-spacing:-.2pt"="" lang="EN-GB"&gt;&#xD;
optimized in terms of&#xD;
reaction temperature (50-85 &lt;sup&gt;o&lt;/sup&gt;C), methanol/ WCO molar ratio (2.6-6.0)&#xD;
and reaction time (2-10 h). Maximum triglyceride conversion of 46 % was&#xD;
achieved at the near optimum conditions. These conditions were defined at&#xD;
reaction temperature of 70 &lt;sup&gt;o&lt;/sup&gt;C, methanol/ WCO molar ratio of 5.1 and&#xD;
reaction time of 6 h.&#xD;
&#xD;
&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;
Page(s): 129-133</description>
    <dc:date>2014-02-01T00:00:00Z</dc:date>
  </item>
  <item rdf:about="http://nopr.niscpr.res.in/handle/123456789/26452">
    <title>Design of High Speed Low Power Counter using Pipelining</title>
    <link>http://nopr.niscpr.res.in/handle/123456789/26452</link>
    <description>Title: Design of High Speed Low Power Counter using Pipelining
Authors: Vijeyakumar, K N; Sumathy, V; Pramod, P; Saravanakumar, S
Abstract: We present high-speed scalable counter architectures for high&#xD;
operating frequencies. The design methodology implemented in a 16 bit counter&#xD;
architecture uses basic module and subsequent modules for count generation. The&#xD;
triggering pulses for a subsequent module is generated from state transitions of&#xD;
basic module and preceding subsequent modules using State Exciting Logic (SEL)&#xD;
in case of synchronous operation where clock pulses trigger all the modules&#xD;
simultaneously. &#xD;
As an extension, we connected the modules in asynchronous mode where the most&#xD;
significant bit (MSB) of module/stage is used as clock pulse for the immediate&#xD;
succeeding module. The novelty of the design is the realization of all&#xD;
subsequent modules with equal number of gates, which maintain uniform setup&#xD;
time for all the D Flip Flops (FFs) in the module. And, thus the D FFs when&#xD;
triggered by clock pulse gives uniform output. The proposed counter is designed&#xD;
using VHDL code and simulated using Altera Quartus II EP1C20F400C7 device.&#xD;
Analysis reveals that the power dissipation of our proposed counter is 80.47 mW&#xD;
and 80.46 mW with delay parameter of 9.097 ns and 22.476 ns for synchronous and&#xD;
asynchronous connection respectively at 250 MHz.
Page(s): 117-123</description>
    <dc:date>2014-02-01T00:00:00Z</dc:date>
  </item>
  <item rdf:about="http://nopr.niscpr.res.in/handle/123456789/26451">
    <title>An experimental investigation on off-grid solar photovoltaic power system  using matrix converter</title>
    <link>http://nopr.niscpr.res.in/handle/123456789/26451</link>
    <description>Title: An experimental investigation on off-grid solar photovoltaic power system  using matrix converter
Authors: Sumithira, T R; kumar, A Nirmal
Abstract: This article investigates the possibility of providing electricity&#xD;
from off grid solar photovoltaic power systems (OGSPVPS) for a remote location&#xD;
without electricity connection in the state of Tamil Nadu. Crucial review of&#xD;
literature disclose that, in the design of a solar photovoltaic power system,&#xD;
matrix converters are not dealt with so far to produce better quality and low&#xD;
distortion power efficiently to the loads. However, cascaded H bridge&#xD;
multilevel inverters are widely used to obtain a stepped sinusoidal output&#xD;
voltage in solar photovoltaic application. In this work, an attempt has been&#xD;
made to design and develop an OGSPVPS by incorporating single phase matrix&#xD;
converters in order to obtain a feasible solution for medium power applications&#xD;
at remote locations. Also, the proposed matrix converter for solar photovoltaic&#xD;
application claim a total harmonic distortion of less than 7%. Finally,&#xD;
simulation results are presented to prove the feasibility and the experimental&#xD;
work was investigated to validate the results. Furthermore, the capability of&#xD;
matrix converters to operate in rectifier mode is presented, thereby substantiating&#xD;
that it can facilitate grid connected solar photovoltaic uninterruptible power&#xD;
supply (UPS) in addition to off-grid system.
Page(s): 124-128</description>
    <dc:date>2014-02-01T00:00:00Z</dc:date>
  </item>
</rdf:RDF>

