Please use this identifier to cite or link to this item: http://nopr.niscpr.res.in/handle/123456789/16880
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dc.contributor.authorPriya, M.Geetha-
dc.contributor.authorBaskaran, K.-
dc.date.accessioned2013-04-13T10:25:10Z-
dc.date.available2013-04-13T10:25:10Z-
dc.date.issued2013-04-
dc.identifier.issn0975-1084 (Online); 0022-4456 (Print)-
dc.identifier.urihttp://hdl.handle.net/123456789/16880-
dc.description217-221en_US
dc.description.abstractNAND and NOR gates are the two universal logic gates and any other logic gates can be built using them. This paper presents a novel three transistors (3T) based NAND gate with exact output logic levels, yet maintaining comparable performance than the other available NAND gate logic structures. The new logic is characterized by superior speed and low power which can be easily fabricated for Very Large Scale Integration (VLSI) designs. The simulation tests were performed by employing standard 90nm CMOS process technology.en_US
dc.language.isoen_USen_US
dc.publisherNISCAIR-CSIR, Indiaen_US
dc.rights CC Attribution-Noncommercial-No Derivative Works 2.5 Indiaen_US
dc.sourceJSIR Vol.72(04) [April 2013]en_US
dc.subjectLow poweren_US
dc.subjectCMOSen_US
dc.subjectPass-transistoren_US
dc.subjectNANDen_US
dc.subjectDelayen_US
dc.subjectFlash memoryen_US
dc.titleA Novel Low Power 3 Transistor based Universal Gate for VLSI Applicationsen_US
dc.typeArticleen_US
Appears in Collections:JSIR Vol.72(04) [April 2013]

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