Please use this identifier to cite or link to this item:
http://nopr.niscpr.res.in/handle/123456789/16880Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Priya, M.Geetha | - |
| dc.contributor.author | Baskaran, K. | - |
| dc.date.accessioned | 2013-04-13T10:25:10Z | - |
| dc.date.available | 2013-04-13T10:25:10Z | - |
| dc.date.issued | 2013-04 | - |
| dc.identifier.issn | 0975-1084 (Online); 0022-4456 (Print) | - |
| dc.identifier.uri | http://hdl.handle.net/123456789/16880 | - |
| dc.description | 217-221 | en_US |
| dc.description.abstract | NAND and NOR gates are the two universal logic gates and any other logic gates can be built using them. This paper presents a novel three transistors (3T) based NAND gate with exact output logic levels, yet maintaining comparable performance than the other available NAND gate logic structures. The new logic is characterized by superior speed and low power which can be easily fabricated for Very Large Scale Integration (VLSI) designs. The simulation tests were performed by employing standard 90nm CMOS process technology. | en_US |
| dc.language.iso | en_US | en_US |
| dc.publisher | NISCAIR-CSIR, India | en_US |
| dc.rights | CC Attribution-Noncommercial-No Derivative Works 2.5 India | en_US |
| dc.source | JSIR Vol.72(04) [April 2013] | en_US |
| dc.subject | Low power | en_US |
| dc.subject | CMOS | en_US |
| dc.subject | Pass-transistor | en_US |
| dc.subject | NAND | en_US |
| dc.subject | Delay | en_US |
| dc.subject | Flash memory | en_US |
| dc.title | A Novel Low Power 3 Transistor based Universal Gate for VLSI Applications | en_US |
| dc.type | Article | en_US |
| Appears in Collections: | JSIR Vol.72(04) [April 2013] | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| JSIR 72(4) 217-221.pdf | 155.32 kB | Adobe PDF | View/Open |
Items in NOPR are protected by copyright, with all rights reserved, unless otherwise indicated.