Please use this identifier to cite or link to this item:
http://nopr.niscpr.res.in/handle/123456789/29729Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Sarkar, B C | - |
| dc.contributor.author | Nandi, M | - |
| dc.contributor.author | Hati, R | - |
| dc.contributor.author | Hati, A | - |
| dc.date.accessioned | 2014-11-05T10:25:20Z | - |
| dc.date.available | 2014-11-05T10:25:20Z | - |
| dc.date.issued | 1997-08 | - |
| dc.identifier.issn | 0975-1017 (Online); 0971-4588 (Print) | - |
| dc.identifier.uri | http://hdl.handle.net/123456789/29729 | - |
| dc.description | 129-133 | en_US |
| dc.description.abstract | A novel charge-pump phase locked loop (CP-PLL) comprising of a modified dual edge sensitive phase frequency detector (PFD) has been proposed. The new structure has an increased loop gain and a faster transient response although its filter time constant, loop VCO sensitivity and pump current magnitude are same as those of the conventional CP-PLL. | en_US |
| dc.language.iso | en_US | en_US |
| dc.publisher | NISCAIR-CSIR, India | en_US |
| dc.rights |  CC Attribution-Noncommercial-No Derivative Works 2.5 India | en_US |
| dc.source | IJEMS Vol.04(4) [August 1997] | en_US |
| dc.title | A novel dual PFD charge-pump phase locked loop | en_US |
| dc.type | Article | en_US |
| Appears in Collections: | IJEMS Vol.04(4) [August 1997] | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| IJEMS 4(4) 129-133.pdf | 466.99 kB | Adobe PDF | View/Open |
Items in NOPR are protected by copyright, with all rights reserved, unless otherwise indicated.