Modal based analysis of binary adders with fault tolerance using QCA in marine applications

Abstract

This paper explains an efficient design and analysis of binary adders using Quantum-dot cellular Automata (QCA) tools. Main goal of this work such as faster speed, smaller size, and less area than transistor based technology. The 64 bit binary adders are modeled using cell minimization techniques and detailed simulation using QCAD. Techniques are used two cells inverter and suitable arrangement of cells without overlapping of neighboring cells. These structures are designed with minimum number of cells in adders by using cell minimization techniques . Performance of 64 bit adder results the less area, delay and achieved the minimum area delay product (ADP).