High-Performance On-Chip Inductor Design using Hilbert Fractal Geometry with Split Ring Array

Abstract

This paper focuses on enhancing the on-chip inductor’s performance by improving the inductance (L), Quality factor (Q-factor), and Self-Resonant Frequency (SRF), which are crucial in the design of high-performance Radio Frequency Integrated Circuits (RFICs) and Monolithic Microwave Integrated Circuits (MMICs). This work proposes a new approach by incorporating a geometry variation of the traditional on-chip inductor using the Hilbert fractal geometry with a Split Ring Array (SRA) configuration. This approach leverages the superior attributes of Hilbert-based fractals in designing on-chip inductors. Simulation results have shown an inductance of 1.249 nH, a Q-factor of 13, and an SRF of 55 GHz, marking three times higher Figure of Merit (FoM) compared with conventional on-chip inductor designs, illustrating the potential that this geometry offers to push forward the performance benchmarks in integrated circuit applications. These results demonstrate the feasibility of fractal geometries to achieve superior performance metrics. The proposed design will become highly prospective for future RFIC and MMIC applications in terms of high-efficiency inductors