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http://nopr.niscpr.res.in/handle/123456789/7044Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Rahim, N A | - |
| dc.contributor.author | Islam, Z | - |
| dc.contributor.author | Raihan, S R S | - |
| dc.date.accessioned | 2010-01-01T11:38:55Z | - |
| dc.date.available | 2010-01-01T11:38:55Z | - |
| dc.date.issued | 2010-01 | - |
| dc.identifier.issn | 0975-1084 (Online); 0022-4456 (Print) | - |
| dc.identifier.uri | http://hdl.handle.net/123456789/7044 | - |
| dc.description | 55-61 | en_US |
| dc.description.abstract | This paper presents implementation of sinusoidal pulse-width-modulation (PWM) for a single-phase hybrid power filter. A series active power filter and a shunt passive filter were combined to suppress harmonic current and isolate harmonic between source and load. For active filter control, PWM was developed in an ALTERA® FLEX 10K Field Programmable Gate Array (FPGA), and modulation index was selected by calculating DC bus voltage of active filter through a digital Proportional-Integral- Derivative (PID) controller. System has been found capable of compensating load current and voltage harmonic within specification of EMC standard IEC 61000-3-2. | en_US |
| dc.language.iso | en_US | en_US |
| dc.publisher | CSIR | en_US |
| dc.source | JSIR Vol.69(01) [January 2010] | en_US |
| dc.subject | Active filter | en_US |
| dc.subject | PWM | en_US |
| dc.subject | Harmonic compensation | en_US |
| dc.subject | FPGA | en_US |
| dc.title | FPGA-based PWM control of hybrid single-phase active power filter for harmonic compensation | en_US |
| dc.type | Article | en_US |
| Appears in Collections: | JSIR Vol.69(01) [January 2010] | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| JSIR 69(1) 55-61.pdf | 133.76 kB | Adobe PDF | View/Open |
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